次の図にex4pを実装した場合について説明する。AはFPGA内に故障がない場合の結果、Bは先行研究での検出結果を用いて故障箇所を回避して実装した結果、Cは提案手法を用いて検出を行い故障箇所を回避して実装した結果をそれぞれ表している。BおよびCでは故障のある左上のエリアを使用せずに配置・配線を行っていることがわかる。また、Bは故障候補数が多いため途中で配線に失敗し配線数が少ない。
Illustration indicates if / when implemented ex4p into the following figures.
"A" indicates a result at a case if there is no failure in the FPGA.
"B" indicates a result of the implementation to bypass a failure location using the detection results of previous studies.
"C" indicates a result of the implementation to bypass a failure location by doing detection, performed by using the proposed method.
In figure "B" and "C", you will see Re-placed or Re-Wired without using the faulty upper left area.
In addition, "B" has large number of faulty candidates and due to the reason has less number of wires because wiring failure occurred in the mid part.
